im searching for a soft processor IP core with the following capabilities:
- Interrupt (more than one interrupt / e.g. saving registers in stack)
- 32 Bit ALU
- common Instructionset (e.g. MIPS or an open source assembler included)
- 'easy' to enhance special purpose registers and their neccesary additional instructions (e.g. Real Time Clock and load RTC-Register to Accumulator)
I found at opencores.com many IP-Cores:
-miniMIPS: miniMIPS seems to be a good choice, but it doesn't fit in a Spartan3 - 200k Gates (108% of LUTs). Did i miss to adapt some Xilinx-specific synthesize-adaptions?
- CPUgen not very good commented source-code... and i think it can only handle one interrupt, right??
- Xilinx Microblaze (not free) does it really occupie only 1000 LUTs with a 32Bit ALU and multiple interrupts? Big disadvantage is the relative high prize of 75Cent per implemented core.
if you have some experience with soft processor cores, please help me with some suggestions.