I need to know the expected signal skew inside the XC2VP30 (FF1152 package) for the various types of routing resources. Eg. the trace delay in units of time/distance. Has anyone encounter this spec?
Additionally, do any of tools provided with ISE 7.1 allow for simulation of an array of synchronous F/F's with all inputs tied to the same net such that SOME F/F's will capture a logic '1' while others will capture a '0' due to the propagation delay of the route?
Routing delays are more a function how many switch boxes you cross, than the length of the wire, use timing analyser to calculate delays (or FPGA editor) ie. a segmented route of the same length with a long line has a significantly different delay.
if you drive all the FFs from the same source you'll add more skew due to increased fanout.
Have fun, Aurash
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