S3E Starter Kit webcast

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With all the competition going on between A and X, I'd like to see more movement in the category "Largest FPGA with free tool support". A, with the Cyclone II EP2C70 has been the leader for a very long time now. X only offers the Spartan 3E XC3S1600E is less than half the size of the EP2C70.

One can only hope that X jumps on the opportunity with Virtex 5.

Tommy

Tommy,

It is extremely unusual for someone who wishes to use the largest part to care about free software.

I believe this category might be re-labeled: "fastest way to throw money away." Make no mistake, Xilinx is a business, not a charity.

If someone is serious about buying the largest parts, they are able to get the software on a trial basis, regardless.

Aust> John_H wrote:

Hi Austin

That's a blanket assertion that I don't buy at all.

Sure, but with that argument why offer free tools at all? Obviously, the reason is strategic. Where the line is drawn is probably a judgement call, but at least one competitor disagrees with you of where that is.

I have done that on occation, but it's a suboptimal solution as I now have a time bomb after which I can't continue developing, I can't share the design, and the development is now constrained to one host.

Well, one can only wish :-)

Tommy

How does it cost Xilinx money to add larger parts to the free, no support, version of the tools? Especially if you are willing to "loan" out the tools to customers at no cost, adding larger parts to the free tools would not cost you any lost sales either.

One area where you may be losing out on chip revenue is when a development board is sold where the customer wants to develop his own FPGA design as part of a larger product. I used to sell DSP boards with an FPGA to provide IO support to the DSP. I had a *lot* of enquiries about programming special apps into the FPGA and could I offer a larger part on the board. This was not part of my business plan since the tools can get expensive for the customer and I did not want to be in that loop. So some boards sales (and FGPA sales) were missed because of lack of support in the Webpack tools for the larger chips.

Aust> Tommy,

Austin, I think you misunderstand. The post was about "largest part WITH free tool support". According to the op, now A seems to be winning this contest and he wanted to see if X would up the ante. You're right, I don't think anyone is asking for LX200 to be supported by free tools but something larger than S3E 1600. How about it?

Yes, but that is not actually what Tommy was asking. He was not asking for the largest devices to be free, just a nudge in the line - and that line has always been moving anyway, so what we are _really_ talking about, is when? not if?

What you've completely missed here, is that users often use MORE than one target device.

They might develop with a larger device/demo board, and then port to a final design.

Now, a bean counter might just see that as an opportunity : If you get your customers able to use larger parts, they might just find one day, that the ported design can no longer fit in the smaller device, and voila, more revenue :) - and what did that really cost Xilinx ?

That same bean counter could map sales of devices, against Tool Ceiling, and that _would_ be interesting data....

-jg

Seems Actel have started to move in this arena aswell with their A3P series chips at least (like A3P1000-PQ208). They got win32 + linux tools for free from what they told me. That adds another competitor to the Xilinx-Altera pool. Ofcourse Altera have no free linux tool however.. ;)

Actually, you got that wrong, as people have, including myself. Admittedly all that I've asked for is that place, route, and bitgen be free ... Xilinx can try to make a buck or too on XST and core sales if it wants, but as I and other posters have said, we are pretty sure that costs Xilinx a lot of money in lost chip sales, and completely trashes the market for larger FPGA boards (losing more chip sales).

While not as large as the Altera's Cyclone II 70, Lattice's ispLEVER-Starter does support the Lattice ECP2-50, a 48K LUT4 90nm FPGA. You can download ispLEVER-Starter here:

Bart Borosky, Lattice

The S3E starter kit was initilaly scheduled for release in july 2004. It became available spring 2006 (this year) . Say no more.

the

regularly.

Maybe it's as to why LUT4/total memory quote matters. Not wheater being on position X in the list matters.