Hi Champs Its Isaac after long time,,,,,,,,,,,,,,I am having problem reading out values from SRAM in FPGA everytime I try to target SRAM I am getting
The code is given below . The check node and variable node component's function is not mentioned here. Can any body pin point the problem....In state s6 I am reading out the values from FPGA. State s2 and s3 are not defined.
P_IO_FFS : process( CLK_2X, LOCKED ) begin if RISING_EDGE(CLK_2X) then if LOCKED = '1' then -- Outputs
-- LED_V3
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J
Jonathan Bromley
Oh, please.....
You have posted more than 400 lines of code.
The code contains no useful comments whatever.
Most of the signal names are incomprehensible.
All the state names are meaningless.
Many of the process sensitivity lists contain signals that they do not need.
Kindly put in the effort to isolate the problem more carefully. As part of that process, you should document your code. This documentation will help you in understanding what's going on for yourself.
If you still have a problem after you have done this, then at least you will be able to post something manageable and there is some chance that someone will try to help you.