I have a verilog design on Spartan 3 which needs to move to Cyclone II.
The design has 7 128x1 bit asynchronous ROMs using ROM128X1 primitives (this is called distributed ROM?).
Does Cyclone II have something similar? what is the primitive and initialisation syntax?
If not will I have to use an lpm_rom megafunction and burn M4K blocks? The ROMs have common addressing so after some hassle rearranging the initialisation data I could use a single 128x7 bit ROM or after some hassle rearranging the design and initialisation data a 896x1 bit ROM.
TIA