Minimize power consumption

For a dedicated once-only purpose, why are you concerned about power? Are you a student who only has so many Joules allotted for use this semester?

I know of no tools that could optimize this in a way that would make you happy.

However, since changing one bit usually has fewer dynamic consequences than changing many bits, consider a Gray code counter. The Gray code counters only change one bit per increment. If you know which of your

32 bits typically uses less power when changing the logic through your f(x), you could assign those to the LSbits of the Gray counter and leave the "swich everything" x bits to the MSbits of the Gray counter.

If you don't know what a Gray counter is, there are many resources on the web. A simple registered XOR of a binary counter would give you the one bit change.

binCnt

Thanks, I know what Gray counter is. But the problem is, that on bus between counter and f(x) I can make increment in manner of Gray counter, but I never now that this property of Gray counter will reflect to each point of f(x) block. I mean that I'm not sure that Gray counter is simple solution.

Besides Binary, and Gray, we have also used Triangle counters (up/Down binary) where that made better table-mapping sense.

Since you presumably already have mapping software, to create your table, then you could modify that to do transistion calculations.

So, you could easily do ALL counter candidates, and run both an edge count in your own SW, and then also the FPGA tools to given another power comparison on the candidate designs.

-jg

If counter is 32-bit, then 32!=263130836933693530167218012160000000 This is a number of possible rewiring variants. I'm not feel myself as pioneer, so that's why I think that there must be some automated way...

That's a strange number - do you not have any idea what your f(x) might be ? Is this a real problem, or an academic one ?

-jg

Your desire is too specific and never a concern in mainstream design so there simply is no automated way.

Well... I'll try to simplify my desire. Is there any tool that can show me gates count switched if I preset previous state of inputs and next state?

You never did answer the question:

In general, I would say no. If the design is in structural verilog (or the VHDL equivalent), directly instantiating gate level primitives then it might be possible. (Synthesis from behavioral verilog is likely not unique.)

It might be that the design can't have any loops. (They aren't necessarily excluded from combinatorial logic, as long as they are guaranteed to resolve.) Then iterate through the design computing how many gate changes are caused by changes in the inputs for a given set of other inputs. It would seem likely that gray code (one input changing at a time) is the best choice, but that isn't guaranteed.

-- glen

Well, what if to switch to lower level, some RTL? If so, there're will be any existing tool to answer my question?

No tool beyond your own knowledge. By instantiating gate level primitives, you have the chance to know through your design how many LUTs you're affecting with any one input signal change. There is no tool that will summarize the number of gates changed by the change of an input. There is no tool that will provide the per-bit level of power usage.

Again: why is this important to you? You have the task of building one table. The assumption we can make is that it doesn't have to be powered by a hand crank or button-cell batteries. There are no tools that will provide you with the microscopic scale of power consumption you desire.