Hi all,
For example, I want to connect a[1] to b[0], where both a and b are buses in the current file of block editor. How to do that? Can you show documents on how to use block editor?
I've been using VHDL for years, graphical design entry of QuartusII looks wired to me. I'm trying to get familar with it.
Thanks a lot.
Chi
Use the WIRE primitive and use a[1] as the name of the input to te WIRE primitive, and b[0] as the name of the ouput of the WIRE primitive. You can insert the WIRE primitive from the Symbol Enter box.
|\ a[1] | \ b[0]
-------------| /---------------- |/ Where the buf type symbol is the WIRE primitive.
Alternatively if you are using Blocks instead of symbols you an use Conduits and set the properties of the mappers correctly. This information is available in the online help for Quartus.
- Subroto Datta Altera Corp.
Thank you Subroto!
can
Conduits
Have something to add? Share your thoughts — no account required.
Ask the community — no account required