For a fast imaging system, we plan to use the LX60 together with x36 organized RLDRAM-II devices?
Has someone else allready made successful realisation and implementation of such a system other than the ML461 board, and is willing to share the hints and tips with the community?
Are (tested and verified) IP cores available for purchase other than the one from Xilinx, (VHDL preferred)?
- Required Clk Speed ~ 250 Mhz
- Required Chips per FPGA ~ 4 (x36 organized CIO interface)
BTW it seems to be hard to get the RLDRAM-II devices such as the : MT49H32M9 ... Any tipps where to buy?
Best Regards Markus
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