A Master burst module want to write something via the PLD-to-STRIP bridge. 14 beat a burst. first the slavehready signal is ready. since begin the translation, the slavehready signal goes down, and will ever being ready untill reboot the system. os is linux-2.4.19.
WHY?
Now I find that if the DMA's dest address is the SDRAM, It will same as above. But if is the Single port ram(SRAM), this DMA moudle worked as expected. ????????????
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