practical Virtex2 output buffer speeds

Robert,

You can run an IBIS simulator.......

By the way, I found out today that there is a public domain software tool that converts IBIS back into spice, so you could then run the IBIS model under a spice simulator that doesn't already support IBIS (like a public domain spice program).

So as to not frustrate you if you just don't have any tool available right now, and are in a position to have to make a decision, our hotline can run "what if" cases if you tell them the IO standard(s) you want to use, the frequency, the trace length, and the load (as in another Xilinx part, or 10 pF, or whatever).

Finally, if you can't even wait that long to get the right answer, my own experience in the lab tells me that for very light loading, and short run lengths (like less than 6 ") if everything is done right as far as signal integrity engineering goes:

Virtex II, single ended IO - 200 MHz (HSTL 1.8V); differential IO - 420 MHz LVDS Virtex II Pro, single ended IO - 266 MHz (HSTL 1.8V); differential IO -

Your mileage may vary depending on loading, etc.

My numbers are for the commercial operating range, and all speed grades (as IO does not vary by speed grade much at all).

Aust> Is it documented anywhere what the practical upper limits are, in terms of

Mbps, for the various Virtex2 output buffer

do I need to use LVDS or HSTL, or can a

HSpice sims, but can I extract this

Thanks, Austin. Not the answer I was hoping for, but I'll figure something out. When will CML be available as a SelectIO option? Virtex 4?

Robert

Mbps, for the various Virtex2 output buffer

HSpice sims, but can I extract this

Thanks, Austin. Not the answer I was hoping for, but I'll figure something out. When will CML be available as a SelectIO option? Virtex 4?

Robert

Mbps, for the various Virtex2 output buffer

HSpice sims, but can I extract this

Hi Austin,

Could you please post a link to this tool?

Thanks, Allan.

out. When will CML be available as a SelectIO