i've synthesized or1200 and it consumed 3920 slices and 7258 LUT's which are beyond what is available with my xilinx device with 400K gates. (I followed instructions ghiven in "openrisc-HW-tutorial- Xilinx.pdf".) Why does this take this much of resources? is it possible to reduce this to an acceptable level? (by removing some stuff).
snipped-for-privacy@yahoo.com schrieb:
What about serializing the problem into smaller parts and computing the OR equation over fractions of 1200?
Ralf
Were you trying to be funny? The OR1200 is an open-source risc core. It's also been a while since the original post.
From reading the output listings of the Xilinx tools, has it used th devices on-chip RAM blocks, or has it inferred flip-flop-based registers If the latter, then you need to do the tutorial again, and correctly thi time...
What part are you targetting?
im targeting spartan 400K gate version. i followed the tutorial correctly. it synthesis output contains thousands of HDL adviser comments. i've disabled the cache and instructed the synthesizer to infer block rams.
I believe or1200 is an open source processor.
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.