No open-drain in V5 to drive an external LED?

Jul 16, 2008 3 Replies

HI,



on our PCB there is a LED directly connected to a Virtex5 I/O pad. The LED is connected through a series resistor to 3.3 V. As it seems Virtex devices do not support open-drain outputs.



If I drive a zero on that output there will be current flowing from the 3.3V through the LED into the FPGA. Does the FPGA tolerate that? Which I/O standard/fashion should I use?



regs, Heiner


Take a look at the Vcco for the bank that drives the LED. If it is

3.3V you don't need open-drain, as a CMOS output high will turn off the LED just as well. If the Vcco is lower than 3.3v you should use the equivalent of open-drain, which is to tie the output signal low and use the tristate function to turn on or off the LED. In Verilog this would be like:

assign LED_PIN = drive_led ? 0 : 1'bZ;

If Vcco is much lower than 3.3V, i.e. lower than 3.3v - Vf of the LED, you may have problems with the LED staying on even if you use open drain outputs due to the protection diodes on the FPGA I/O pin.

HTH, Gabor

Gabor wrote: (snip)

That looks like a good way to me.

A blue or white LED should have a large enough Vf. Otherwise, a series diode or so should do it.

-- glen

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