does anyone have an answer to the following two issues on using leonardo:
- How can I see the exact functionality of the the cells Leonardo produces in its RTL Schematic, after reading my input HDL files? e.g. After synthesizing my code I get an RTL schematic with some cells (that look like multiplexers) and that only give me the info that they are instances of an "select_3_3" entity from the library "OPERATORS", but I can't really tell what they do or find this library.
- When I use the VHDL "block" statement, the synthesizer appears to completely neglect (in its RTL schematic) the blocks I asked for. It creates the same schematic it did before I entered the block- statements. Is there a way to make the synthesizer take into account block-statements?
Thank you in advance guys!