Hi there,
I've heard that some Lattice FPGAs support M-LVDS signalling.
Did anyone has any experience with lattice M-LVDS? Are they true M-LVDS driver/receivers? What are the deviations from the TIA/EIA-899 specification? Finally are They current-mode drivers?
Thanks.
driver/receivers? What are the deviations from the TIA/EIA-899 specification? Finally are They current-mode drivers?
The only support I've seen for M-LVDS from Lattice uses external resistors to emulate the spec. Check out the ECP2/M family datasheet figure 3-5 and Technote
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