Definitely C is linked fairly close to VHDL/Verilog. But there are a few key differences that I had to consider when learning HDL's to truly understand what was going on. For example the non-blocking statements in a clocked sequential processes in VHDL. I orignally assumed that like software , signal assignments would happen instantly after the line has executed, but I was wrong. A few minutes playing around with ModelSim revealed that they occur on the following clock pulse (when the flip flops sample the data input).
So there was a bit of a retraining process even though the syntax was somewhat familiar.
This is a fairly tough question as we wouldn't be discussing this if this was something that we could all agree on. I believe that both are hardware and I will explain my reasoning:
FpgaC for example is a totally different ball game from VHDL/Verilog but they ultimately result in a piece of hardware at the output.
FpgaC (from the example posted at the TMCC's website at U of Toronto, where I happen to live :) ) hides completely the hardware elements from the designer. Allowing them to give a software-like *DESCRIPTION* (key word) of the hardware. What you get is ultimately hardware that implements your "program".
VHDL/Verilog on the other hand do hide most of the grunt work of doing digital design but still you have somethings left over like what I pointed out above about the non blocking signal assignments.
We have always progressed towards abstraction in the software world,similar pushes have also been made in the hardware world with EDA's and CAD software packages like MATLAB, which automate most of the grunt work. Perhaps program like HDL's are the new progression.
All I can say though, is only time will tell. It depends on how well compilers like FpgaC will be able to convert a program to hardware description. Also how well it be able to extract and fine opportunities for concurrency.
-Isaac