Hi there,
I'm trying to build a new core that will use a IPIF PLB interface to connect to the PLB. Most of my logic is ready to roll and tested independantly, but when I came to add the IPIF interface I fell over at the first hurdle :(
I'm using ISE 7.1, and I started a new project, and had guessed that the IPIF logic block would be something I could generate with CoreGen, but apparently not. A search of xilinx.com with IPIF related terms didn't present me with a getting started guide.
Any pointers on how I instantiate an IPIF block. My top level will be produced with VHDL (unless I really have to switch to verilog), and I want to use the IPIF on the PLB and use the DMA capabilities.
Cheers,
-- Michael, sure he's missing something obvious here