Hello,
Xilinx has provided with HWICAP module which allows one to read and write configuration frames within the same FPGA. In the documentation it has been mentioned that using it one can read/write CLB frames but no mention has been made about BRAM frames. Will it also be able to access and update BRAM's as well?
Please do let me know.
Thanks Harish
Yes it can, look in the .ll (logic allocation) file for the appropriate addresses
Good luck, Gerd
Hello Gerd,
Thanks for the reply. Could you provide me with any information you have obtained with regard to the amount of time in terms of clock cycles it takes to read/write
Also could you share your experinece in using the HWICAP module Thanks Harish
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