Trying to design an FPGA from scratch, but not sure how this fpga should be programmed. It is going to be a tile concept fpga with a LUT SRAM architecture.
I have the resources to write VHDL/Verilog, netlist it and do the layout(incl. routing), but how do I program this fpga? I guess this is something I am not too clear about. Thanks folks
Very carefully!
Go and do some reading. My advice is to start with the website of the FPGA vendor you've chosen. Alternatively, as you seem to work for Intel, get them to send you on an expensive course.
HTH, Syms.
p.s.
Look in the data sheet. There will be a section on that area, maybe called Configuration.
The compiler will give you a pile of bits. Typically, you feed them serially to the FPGA with clock and data pins. You can bit bang it from a small CPU. In a different mode, the FPGA can probably wiggle the clock to load itself from a serial ROM. (Then you have to program the ROM.)
You can usually load them via JTAG.
The vendor probably provides a tool to do it.
It's probably simplest to get one of the low cost starter kits and follow the directions for one of their demos. Or just read their documention to see how it's done.
-- These are my opinions, not necessarily my employer's. I hate spam.
Thanks for the responses, but I think I need to be more clear on my question. First off, this is for a class project for my advanced degree, so my employer has nothing to do with it.
When I mean design an FPGA, I literally mean designing it. Not programming a vendor's FPGA.
So going back to my original question, if I did design an FPGA with LUTs and SRAM, how can I program this FPGA to do a particular function? Do I write the software? If so, is that an easy thing to do?
Are there any tools available that would let me program any FPGA? I looked at DAGGER, but seems like it needs an input file from the VPACK tool. thanks again.
I think you still need to explain yourself more. Are you creating a design of your own custom FPGA (that other people could theoretically program) for a class project? Are you planning to actually fab a chip through some university program like MOSIS? That seems like an pretty ambitious class project.
When you say software to program the FPGA are you talking about something to download the bitstream? Or are you talking about the complete HDL synthesis and place and route tool chain?
-Jeff
You have to also design the programming architecture into your FPGA. FPGAs are basically SRAM (LUTs are SRAM too), configurable DFF cells and a whole lot of wires with switches on each end. The SRAM blocks and DFFs (assuming you don't have any other hard macros ala multipliers etc) have their inputs and outputs connected to some switches which are connected to the wires too. So you connect all the control inputs of the switches to some regular DFFs which are connected in a scan chain type connection themselves and when you generate the programming file, you shift it in upon which you configure all the switches and the configuration options of your DFFs. If you also want to initialize your SRAM blocks you can design configuration time memory controllers which write the shifted value into them to the SRAM.
If you're doing any non-trivial FPGA design, I think you'll find that generating the actual programming file itself from your logic design specification is one of the most time consuming tasks.
This sounds rather involved for a class project. And more of an exercise in CAD tools than anything else.
I'm not sure what you're getting at here. What do you mean by "program", exactly? Putting the bitfile into the FPGA? Generating the bitfile from a placed/routed design?
You might be able to modify DAGGER to do what you want. But this might be a good time to take a step back and figure out 1) what exactly you want to achieve with your project, 2) what requisite knowledge you have yet to acquire, 3) whether it's doable in the timeframe specified.
Cheers, Mike
I think we all wonder what you want to achieve with your project. You could re-invent and re-implement what Xilinx did 25 years ago, but what would that do for you, or for anybody? It's hard to help you when you leave so many things un-explained. Peter Alfke
You set the config bits, typically serially loaded.
Yes
No.
What does your Professor want ?
How many hours are allocated to this ?
Does he want working silicon (!), or a simulated result ?
How will your FPGA vary fom the 'mainstream' ones, and what aspect of that difference do you need to demonstrate ?
How large does this need to be ?
-jg
For proof-of-concept you should be able to generate a bitstream that hooks a few gates to a flop from inputs to outputs. Since you designed the FPGA, you'd know how to do that.
If you want to generate that from a high-level description there will be significant software involved. You may be able to take a frontend like Icarus Verilog and write a new backend for your project, but it will take considerable software expertise.
-- Ben Jackson AD7GD http://www.ben.com/
Thank you all for your inputs on this subject. You are right, I would first want to evaluate what I am signing-up for and thats exactly what I am doing in this group :) It would definitely not go all the way into fabrication, but a proof of concept would be good enough. The idea is to create a novel tile architecture that does not exist today.
Question for Mike. I thought Dagger was a web-based tool. Can I really modify it?
I just did a search, skimmed a poster and a user's manual, so I don't know very much about it. The thing is, if you're in academic research, you can ask the people who developed Dagger for their source code, and they'll probably be happy to share it with you. That's the way it usually works.
But really, what sort of class inspires such a complicated project?
Cheers, Mike
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