Hey Xilinx

Apr 07, 2005 6 Replies

Any chance of there ever being an FPGA where one or more of the SelectRAM blocks is nonvolatile?



I design a lot of stuff that is programmable and reconfigurable beyond the FPGAs. I commonly need to store the setting of digital delay chips and switch settings and other control lines so that a unit powers up with everything in the state desired by the end user.



Currently I use little automotive serial EEPROMs, but, dang but it'd be nice to have a little EEPROM inside an FPGA. Just one 18Kbit block would do wonders.


There already exists a solution for you. Lattice has an sram+flash fpga called the XP. It has embedded 9k bit block rams that you can store their entire contents in flash, so when the part starts up it can be initialized with whatever data you want.

formatting link

NvM in a 90nm std CMOS process is not easy to do. There's only one solution I know of (Virage's NOVeA), but 18Kbit would be a large chunk of silicon. Embedded FLASH in 90nm is years off, and by then, FPGAs will be 65 / 45nm. An MCP would be nice, but this isn't really a huge advantage over having an external memory as FPGAs have so many I/Os.

Can't you write your configuration data into your FPGAs configuration PROM?

Cheers, Jon

Not quite an entire solution but you can store "fixed" parameters in the programming flash memory. Xapp482 has coverage of this and is here

formatting link
.

John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board.

formatting link

beyond

chips

be

The Altera MAX II parts can do this. They contain 8kb of flash that can be both read and written by your design to store anything you want. See

formatting link
for details on how to use it.

Vaughn Altera [v b e t z (at) altera.com]

Why can't one use 130nm (or even 180nm) embedded flash in a chip design that uses 90nm for everything else? (Yes, I'm largely ignorant of chip design issues at that level. I usually only do HDL design.)

Eric

Requires significant additional process steps, which may be incompatable with the 90nm process.

Nicholas C. Weaver. to reply email to "nweaver" at the domain icsi.berkeley.edu

Join the Discussion

Have something to add? Share your thoughts — no account required.

Didn't find your answer?

Ask the community — no account required