I have an FPGA-based prototype for a PCI product in development. Since the intended product application will involve very high speed data transfers, we have designed all the I/O and internal busses in the FPGA to work on synchronous protocols. Now, however, I'm running into a real stumbling block.
The problem is in testing the board. What I need to do is to be able to generate some test data on a PC, and send it to the FPGA, simulating data flow through the system under test. Similarly, the PC needs to be able to receive test data from the FPGA. Because of the design of the board, I need to use a synchronous, hardware-based protocol and interface to transfer the data.
However, there doesn't seem to be much hardware out there that will enable me to do this, at least not at reasonable cost. All I need to do is dump bitstreams in either direction, synchronously, but I have met with little success. We made an abortive effort to use LabView together with their DIO-32HS, which seemed promising and (supposedly) offered a high-speed synchronous protocol, but when we tried to use it, the protocol didn't work, we couldn't make it work, and apparently nobody at National Instruments had tried using that protocol and gotten it to work. Indeed, I saw others posting on the Labview NG, running into the same problems! So that's not an option.
So, what would be the easiest way to create a test interface that lets us transfer data using a synchronous protocol at reasonable speeds (at least10 MHz) between a PC and a device under test? Our prototype board has no shortage of high-speed, MICTOR connectors that we can use to interface to. We're willing to spend some dollars to do it, but if it starts escalating into the thousands of dollars just to get a simple test interface, I think that such a price is disproportionate relative to what we need to achieve. So I think a fair budget limit is around $2000. Any suggestions?