Guideline for PCB routing for PCI signal

Hello guys, Can anyone please suggest guideline for routing the PCI signal from fpga to the connector.

Thanks in advance, regards williams

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If you're building a daughtercard (as opposed to a motherboard) you should follow the maximum lengths per the PCI specification. Also note that the clock line is a length matching spec, not just a maximum. Briefly, the bulk of the 32-bit signals spec 1.5" max to the connector. Clock is 2.5" (matched length), and the 64-bit extension signals spec

2" maximum. Exceptions include interrupt lines and the reset signal.

With any luck your FPGA pinout helps you meet these requirements.

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