fpga hardware "breakpoint"

Hello,

When doing development using microcontrollers/processors, you can often find ICEs and ICDs that allow you to set breakpoints. You can stop the code in execution and view the contents of registers, state of input pins, etc.

Suppose I want to do something similar with an FPGA-based design. What are my options? I know I can output internal signals to output pins and sniff them using a logic analyzer, but I'm hoping there is a more elegant solution. I'd like to stop everything at some point and view all inputs, outputs, registers, etc.

Can someone point me in the right direction?

Reply to
shawnn
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Search the Xilinx website for "Readback" Peter Alfke

Reply to
Peter Alfke

If you learn an HDL, modelsim will allow you to trace your code and set breakpoints during a simulation. Much more elegant than a logic analyzer.

-- Mike Treseler

Reply to
Mike Treseler

Have a look at products like dialite, fs2, or vendor specific ones like chipscope and signaltap.

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Hans

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Reply to
Hans

Thanks for the replies everyone, they have been very helpful.

Does Lattice provide a vendor-specific monitoring library like Xilinx and Altera??

snipped-for-privacy@gmail.com wrote:

Reply to
shawnn

schrieb im Newsbeitrag news: snipped-for-privacy@g44g2000cwa.googlegroups.com...

yes, included for free ispTrace

Antti

Reply to
Antti Lukats

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