FPGA DVI output with CH7301

Hi

does anybody have some experience with DVI output using Chrontel DVI transmitter (CH7301)

the DVI transmitter works in analog RGB bypass mode OK, I see a pong game on analog monitor

but in DVI mode there is nothing on the output, even DVI Clock is missing, DVI hotplug detect works, eg the DVI transmitter shuts down when I unplug the connector except that I can see nothing that tells me anything why the DVI transmitter is not sending anything. All voltage levels seems to correct, the bias voltages are ok, XCLK is 25MHz H/V Sync DE I think are also valid.

Chrontel datasheet doesnt tell much, I have set the DVI power control bits to active, and there doesnt seem to be any secret sequence to enable the DVI output

Antti

PS if someone is able to provide consulting help that helps me to get the CH7301 working I may be able arrange a free eval board with CH7301+V4 as thank you gift. At least I will do my best to arrange it.

Reply to
Antti Lukats
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comments to myself - need to learn to use DSO the DVI output signals are there just with a small swing about 180mV peak to peak

when the clock mode is set to DDR the I see DVI clock twice the XCLK, when single clock edge mode then the XCLK is seen as DVI clock what sounds proper, also the DVI data lines have something on them what looks like it should like (when using

500MHz bandwith DSO)

DVI monitor still fails to detect signal, so something is still too badly wrong, but at least I know there is some signal going out so it makes sense to proceed.

anway if there is some trick or advice that helps to get valid DVI out I am all ears

Antti

Reply to
Antti Lukats

Hi Antti,

where are the input signals of the Chrontel coming from ?

The active clock edge should be around 1 to 1.5 ns later than the other signals edges.

I am using the Chrontel for DVI digital and analog output and it works. The image source is a Silicon Image which sends data to an FPGA. In the FPGA the data are converted to DDR signals. Also the clock adjustment is managed in the FPGA.

Rgds Andr=E9

Reply to
ALuPin

schrieb im Newsbeitrag news: snipped-for-privacy@g49g2000cwa.googlegroups.com...

Hi Andre

thanks for fastreply - well I am only about to test an PCB board that 'functional test' so I implemented some video sync generator and then tested it with CH7301 in analog bypass mode, everything fine. I played a little bit with the clock edges, etc.

the problem is that as soon as try to see the same signal on DVI monitor it either remains blank or says no signal detected. As much as I understand in order to enable DVI output 0xC0 write to register 0x49 is sufficent (assuming everything else is ok for the analog mode).

But what I see exactly nothing. I assume my signal polarities are ok

DE active high H/V sync active low

my my signal source in FPGA is way off and the monitor doesnt recognize it, but still weird. At the moment I am not even sure if the DVI clock is accepted by the DVI receiver (eg TFT display).

a TFT display is not really a good thing to test bring up of an DVI transmitter :(

I created a DVI RX active termination emulation board and measured the signals using it, the signal swing is same as if monitor is attached - well it is way below the standard requirements, but maybe my DSO doesnt measure the signal correctly :(

at the monent I would be very happy to have

1) known good DE+h/v sync generator IP that generates valid signals for DVI output to be accepted by the monitor

or I can try to check my signal timings and adjust them and hope that one day the monitor will accept the signals

Antti

Reply to
Antti Lukats

What frequency / resolution are you working with ?

Rgds Andr=E9

Reply to
ALuPin

schrieb im Newsbeitrag news: snipped-for-privacy@g43g2000cwa.googlegroups.com...

What frequency / resolution are you working with ?

Rgds André

basic VGA, 25MHz XCLK

after some more testing

1) if I turn monitor off then on again, it remains ON (no auto power off) and does not display loss of signal 2) when I then write 0x00 to 0x49 shutting down the DVI output then monitor does respond with 'loss of signal'

so I assume my sync/de signals are messed up - will be fighting again tomorrow

Antti

Reply to
Antti Lukats

Did you set the "Clock Mode Register" corresponding to your single-edge/dual edge clocking ? And the "DVI PLL Filter Register" corresponding to your frequency ?

Rgds Andr=E9

Reply to
ALuPin

schrieb im Newsbeitrag news: snipped-for-privacy@g14g2000cwa.googlegroups.com...

the clock mode is set properly, but I did not touch the DVI PLL Filter Register leaving at factory default

thanks for suggestions

Antti PS your email is non-responsive, please email me in private

Reply to
Antti Lukats

schrieb im Newsbeitrag news: snipped-for-privacy@g14g2000cwa.googlegroups.com...

Hi Andre,

that was it! I should really to the RTFM thing more often, I had looked at those regs but they had 'use default' value for them so I assumed they have some good default at powerup but they dont - thats actually written in the datasheet as well

so after writing the proper defaults the DVI TFT monitor did come alive, no issues!

Thank you!

Antti

Reply to
Antti Lukats

Read the EDID information off the monitor. You'll need a PC with a DVI port and the utility found here:

formatting link

Make sure the FPGA is generating timings supported by the monitor you are using.

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Martin Euredjian eCinema Systems, Inc.

To send private email: x@y where x = "martineu" y = "pacbell.net"

Reply to
Martin

"Martin" schrieb im Newsbeitrag news:LEyuf.51362$ snipped-for-privacy@newssvr14.news.prodigy.com...

formatting link

Thanks Martin,

I may need the EDID tool later, but my issue did turn out to be missing values for the PLL settings in CH7301 as soon as I fixed both my FPGA design did immediatly start to display a picture on the monitor so the display timing wasnt as critically wrong

Antti

Reply to
Antti Lukats

That are good news :o)

Rgds Andr=E9

Reply to
ALuPin

Antti -

I'm starting a design where we'll be using DVI to distribute display data within an embedded system and I'd like to be able to also drive a monitor for demos and debug. Did you need to communicate with the monitor via SMBus/I2C or did it come up in VGA mode by default?

Thanks, Rob

Reply to
RobJ

"RobJ" schrieb im Newsbeitrag news:qRRuf.9548$ snipped-for-privacy@tornado.socal.rr.com...

there is no need to talk to the monitor at all, its only informative to query the capabilities, monitor does not care if that info is accessed or not.

CH7301 however needs I2C initialization in order to be operational, this both for Analog bypass and for DVI modes, with cold start defaults there is no useable output from the CH7301, I assume its the same thing with the other DVI transmitters

we use an small PicoBlaze design to feed the CH7301 with register initialization sequence

if you are interested we have PCB boards ready for DVI tests, the PCB can be fitted for you with just the DVI part that is the board would hold

1 DVI connector 2 CH7301 3 power input jack 4 power supply ics 5 Cable IV header 6 Virtex 4LX15 (or LX25 or FX12) 7 Clock oscillator

the board has some other components as well that can be fitted, unfortunatly I dont have full specs or pictures ready, please email me if interested

Antti

Reply to
Antti Lukats

Thanks, Antti. I'll contact you if we need a board.

Rob

Reply to
RobJ

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