FPGA CAD researchers: documentation, APIs, file formats & tutorials for academics to interface to Quartus

I am pleased to announce that Altera has opened up its Quartus II CAD suite to university researchers. The Quartus University Interface Program, or QUIP, toolkit is designed to enable university (or other) researchers to plug new CAD tools and ideas into the Altera Quartus II CAD flow.

QUIP describes Altera's devices, interfaces by which data can be sent into the Quartus II software at various points in the CAD flow, and data formats in which data can be dumped out of the Quartus II software. QUIP also includes tutorial and sample programs showing how to use the various APIs and data file formats. This toolkit enables researchers to write point CAD tools that perform one CAD optimization in a new or better way, and integrate their new CAD tool into a complete CAD flow so they can get realistic results on how this new idea improves circuit timing, routability, device utilization, compile time, or other metrics.

You can augment or replace virtually any phase of the Quartus II CAD flow (e.g. all of synthesis, or logic optimization, or technology mapping, or placement, etc.) or add new phases (floorplanning, wire-type routing, physical synthesis, etc.). You can then get statistics back from the Quartus II CAD suite showing how much your new tool or algorithm improves circuit timing, routability, device utilization, or other metrics. You can quickly test new CAD ideas in an industrial strength tool flow, and avoid having to write a complete CAD suite to test your ideas.

The benefit to academics is the ability to focus more on innovative CAD algorithms and tools, and less on putting together entire CAD flows to test out these new algorithms and tools. In my PhD I spent five years writing a place and route system, including timing analyzer, etc., so this would certainly have helped me graduate faster!

The benefit to us at Altera is (we hope!) more FPGA CAD research, and research not just on simplified FPGA architectures and on simple benchmark circuits, but on the full range of problems presented by today's complex FPGA architectures, and the complex hardware designs going into those FPGAs.

For more details on QUIP, and to download all the documents, tutorials, APIs, etc, see

Feel free to contact me, or mail snipped-for-privacy@altera.com, or post to this newsgroup, if you have any questions.

Regards,

Vaughn Betz Altera