Download the contents of the FPGA's RAM block

I have FPGA DSP design that has several RAM blocks. What is the easiest way to transfer the content of the RAM to the PC? I am using Xilinx Virtex-4 ML402 board with Platform Cable USB.

Thanks, Dan

Reply to
EEngineer
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Do you need real time access, or more debug information?

I would take a serial connection (open cores has them) and an intelligent PC COM software. There are several which are able to completely receive large data streams. So there is not much work to do. Possibly you need a level converter like the MAX x232. You may also want to transform the rams into dual port mems to easier access them.

Reply to
fpgauser

For now 115kbits/s would be OK for me as the design I am testing needs to send a content of 16Kb BRAM data at a time, transfer time of several seconds would be fine. But when I expand my design USB transfer would be much better but I am not sure yet how much more complicated would be to make use of the USB port on my FPGA.

-Dan

Reply to
EEngineer

Hi,

You might want to consider using chipscope pro, provided if you have BRAMs for its storage. Chipscope will store your signals in real time (at FPGAs clock speed) and after capturing, display them on its analyser. You will be severly limited by the amount of BRAM though. Given enough block ram you can store upto 16k samples of a signal. If you insert single logic analyser core (ILA core), then you can store upto 256 signals for display later. You can trigger your signals at any combination or desired point.

Putting USB in a system is a complete new project with its complexities. You will need an external protocol negotiator (since you wouldnt want to write your own IP). So a microcontroller with all the issues resolved may offer a solution and USB data in form of FIFOs which can then be interfaced with the FPGA for data readout. You will require a PCB redesign in that case. Cypress, Microchip etc. offer microcontrollers with USB hardwired USB Protocol resolvers inside.

Hope this helps.

Mak

Reply to
makhan

I have been using chipscope before, evaluation version, I found out that it works up to 16K samples which was exactly what I needed. The problem was that the whole procedure was tedious for the amount of tests I wanted to perform. I needed to transform the downloaded data file with matlab in order to get the desired format so I could calculate PSNR. Chipscope is good for debugging where you have to watch many signals (you can capture up to 256 at a time) but it is not convenient to download the data from the FPGA.

I guess that Ethernet interface requires similar steps to implement as USB? Maybe I will just go for open cores and UART then, and do the faster interfaces later down do road, when I need faster data rates.

-Dan

Reply to
EEngineer

Actually, you can use TCL to control ChipScope for data IO. If you don't need huge amounts of data, this is the easiest to implement and less all-around hassel way of doing it. It runs in a command window even, no GUI required. Dump the data to a file, or shared memory, or send it out on a socket, and Matlab won't know the difference.

---Matthew Hicks

Reply to
Matthew Hicks

Reply to
makhan

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