Distributed RAMs / SRL: Why not, Altera?

Michael

I am fairly sure that this is a patent issue. Xilinx have the patent and for some applications the local ram and srl16 are very useful. They aren't going to give that away easily although the origional patent must go back some time.

John Adair Enterpoint Ltd. - Home of Raggedstone1. The Cheap Spartan3 Development Board.

A lot of it is distinguishing features.. how do we make our product different to everyone else's.... LVDS is different.. even the way you can use block rams is different.. if they were the same then it would be hard for the marketing people to sell customers on. Also the SRL16 and distributed ram isn't free.. or Spartan 3 wouldn't have removed half .

Simon

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Hello John,

I think this must be a patent issue, too. But again: Is the fact of programmable luts really patentable. Altera can't simply copy the Xilinx implementation, thats clear. But can't they realize the programmability in another way, give this feature another name and that's it??

And i still don't understand the difference regarding patentability between programmable luts and dsp-blocks..

Michael

P.S. I seems to me that there are far more xilinx people active in this list than guys from altera. Why is altera so quiet?

John Adair wrote:

Altera guys are too busy using the parts - Xilinx people have more time on their hands waiting for them to become available... ;-)

Michael

Some of this is the way the US system allows patents. They do patent things that here in Europe that would not get past our patent bodies. There is also a culture in the US that if they stand a chance of something being useful they patent it. Companies over here are traditionally much more conservative in going after and policing patents.

There does seem to be an imbalance in this newsgroup but there are Altera users and people here. You could speculate why but historically the toolsets meant that Altera users came from a push button design approach mentality and Xilinx users came from a more power user background. Now with Xilinx making it's tools more push button (if you want to) and Altera going the other way towards making more control available there isn't a lot of difference in toolset capability and it is more a look and feel issue to which toolset you like.

There are other factors. Many years ago my company Enterpoint probably did as much Altera as Xilinx. Here in Europe Xilinx started the European Consultants program which is generally accepted as the predecessor to the Xperts Program now merged into Alliance. About a similar time Altera started ACAP. The difference was that the European Consultants Program was a very low overhead to entry and gave back a good knowledge base. ACAP conversely had a high entry and maintainence cost. We considered the options and essentially went Xilinx. The inside track knowledge and contacts we have had in Xilinx since have pulled us more and more stromngly towards Xilinx. Altera also had a few years where products that were behind or simply missed the target markets but I will say I think that issue has been rectified now and Altera is a strong competitor to Xilinx in most areas.

John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board.

Altera seems to focus on customers who use HDL design entry/simulation/synthesis and rarely work at the LUT level. I expect that Altera's largest customers would not see a Xilinx style logic cell as a big advantage.

Xilinx seems to focus on customers who want to squeeze the last dollar, gate and nanosecond out of their designs. As a result, many of the posts here concern such squeezing, specific to Xilinx device architectures. Many Altera users think in vhdl or verilog and do not post much here.

-- Mike Treseler

Hello Mike,

Can i conclude from your remarks that Altera users want to waste logic resources (=money)?? I agree that modern digital design should concentrate on vhdl/verilog and that it should be the job of the synthesis tool to map this to the device effectively. But i simply don't see any advantage in offering the synthesis tool less optimization opportunities..

Our company is one of Xilinx' largest customers in europe (T&M,broadcasting,communications) and our local Altera guys were extremely happy to gain such a large project against xilinx. I can say that we want to get all out of the part and we would definitely appreciate such an option in the altera logic cell...

greet> Michael Kramer wrote:

I would not draw such a conclusion. Sometimes getting to market quickly will more than cover some padding of resources. For a field upgrade, the part is already soldered on the board, usually with unused capacity. A quick field upgrade that works the first time can save a large system sale.

I have no facts to offer. You have my speculation. We do packet processing/analysis and no DSP so I have not run into this memory limitation.

-- Mike Treseler