die's in different packages

can someone tell me if there is any differences in the die for the following 2 devices in virtex-7

XC7VX415TFFG1158 and XC7VX415TFFG1927

Both these devices are listed as having same logic resources. XC7VX415TFFG1158 has 35 X 35 mm package XC7VX415TFFG1927 has 45 X 45 mm package

Can I assume that the only difference is the package and the underlying die is going to be the same?

TIA

Reply to
Sharan
Loading thread data ...

I'm not in the V7 camp yet, but to date that is the way Xilinx handles chip products. For each family and gate size there is one die, which has different bond-outs depending on the package. If it's a small die in a large package you end up with non-connected package pins. A large part in a small package ends up with unbonded IOB's. But open the parts in the FPGA editor and you see the exact same diagram with just different labels on the IOB's. In fact on the smaller packages you can use the unbonded IOB's as extra resources if you run out of fabric flops for example.

-- Gabor

Reply to
Gabor

Thanks, Gabor.

Also, can you tell why certain devices are in a specific package while another device with more supported pins is in a smaller package.

For example (example only, nothing specific to Virtex-7) v7vx1140t - min package is 45 x 45 mm package & supports 480 pins v7vx585T - min package is 35 x 35 mm package & supports 600 pins

I am not sure why a 480 pin needs 45X45 mm package while 600 pins is put in a 35X35 mm package

--------------------------------------- Posted through

formatting link

Reply to
sharanbr

in

Look at the inter-ball dimensions on the different packages.

--------------------------------------- Posted through

formatting link

Reply to
RCIngham

Also larger die will require more power and ground pins.

Reply to
Greg Kramer

in

The 7VX1140T will be available in two packages the FLG1928 and the FLG1930 both of these are 45x45mm 1.0mm pitch packages.

The 7VX1140T-FLG1928 supports 0 GTX lanes, 96 GTH lanes and 480 Select I/O. The 7VX1140T-FLG1930 supports 0 GTX lanes, 24 GTH lanes and 1100 Select I/O.

The 7VX585T will be available in two packages the FFG1157 (35x35mm) and the FFG1761 (42.5x42.5mm) both of these are 1.0mm pitch packages.

The 7VX585T-FFG1157 supports 20 GTX lanes, 0 GTH lanes and 600 Select I/O. The 7VX585T-FFG1761 supports 36 GTX lanes, 0 GTH lanes and 850 Select I/O.

Your original comparison was only for the Select I/O pins which is why it seemed odd to you. Each of the GTX/GTH (MGT) lanes takes 4 pins for the TX/RX and for each quad block of MGTs there are 2 reference clocks (4 pins) plus additional power and ground pins.

Ed McGettigan

-- Xilinx Inc.

Reply to
Ed McGettigan

in

Trying again, as the first post doesn't seem to have gone through (at least on google groups).

The 7VX1140T will be available in two packages the FLG1928 and the FLG1930 both of these are 45x45mm 1.0mm pitch packages.

The 7VX1140T-FLG1928 supports 0 GTX lanes, 96 GTH lanes and 480 IO The 7VX1140T-FLG1930 supports 0 GTX lanes, 24 GTH lanes and 1100 IO

The 7VX585T will be available in two packages the FFG1157 (35x35mm) and the FFG1761 (42.5x42.5mm) both of these are 1.0mm pitch packages.

The 7VX585T-FFG1157 supports 20 GTX lanes, 0 GTH lanes and 600 IO The 7VX585T-FFG1761 supports 36 GTX lanes, 0 GTH lanes and 850 IO

Your original comparison was only for the Select I/O pins which is why it seemed odd to you. Each of the GTX/GTH (MGT) lanes takes 4 pins for the TX/RX and for each quad block of MGTs there are 2 reference clocks (4 pins) plus additional power and ground pins.

Ed McGettigan

-- Xilinx Inc.

Reply to
Ed McGettigan

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.