Hello friends
I can't understand how the Pipeline stages affect the multiplier core? I tested 1 stage and 4 stages. The result is given with 1 clock for 1 stage, and 4 clocks for 4 stages.
When i decrease the clock frequency, no difference is happened. But as i increase the clock frequency for 4 stages,the result is given with
5 clocks! why?
what is benefits of 4 stages in comparison to 1 stage?
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