I think the FIFO16 is not the killer of the simulation. i saw the empty flag and full flag toggle. I run the the synthesis by xst and precision. and generate the time simulation model and see the difference. Here is the error send by the memory model.
time simulation model create by using precision as synthesis, i got the following error: # ddr2_test_tb.X16_0_7.cmd_addr_timing_check: at time 208548390.0 ps ERROR: tIH violation on ADDR 10 by 304.0 ps # ddr2_test_tb.X16_0_0.main: at time 208548403.0 ps ERROR: tIS violation on ADDR 10 by 237.0 ps
i got lots of them then it just stop the simulation.
time simulation model create by using xst as synthesis, i got the following error: # ddr2_test_tb.X16_0_7.cmd_addr_timing_check: at time 208548373.0 ps ERROR: tIH violation on RAS_N by 319.0 ps # ddr2_test_tb.X16_0_6.cmd_addr_timing_check: at time 208548373.0 ps ERROR: tIH violation on RAS_N by 319.0 ps # ddr2_test_tb.X16_0_5.cmd_addr_timing_check: at time 208548373.0 ps ERROR: tIH violation on RAS_N by 319.0 ps # ddr2_test_tb.X16_0_4.cmd_addr_timing_check: at time 208548373.0 ps ERROR: tIH violation on RAS_N by 319.0 ps # ddr2_test_tb.X16_0_0.main: at time 208548399.0 ps ERROR: tIS violation on RAS_N by 224.0 ps
i also try to look at internal signal. cinflict_detect, ctrl_dummy_wr_sel, ctrl_dummyread_start never went high. The init_count is 1.
Do anyone have some idea that make the controller working.
Thanks! Berry