Darnaw1 - PGA Spartan-3E Module

We have just posted the schematics to this product and given some more details on I/O counts on our engineering website. Details are here

I am still interested in feedback on this product as we start the design of Darnaw2 in the next few weeks so it is your chance to influence what we produce.

John Adair Eneterpoint Ltd.

Andreas

It is not on the web web yet. I will see if I can hurry it up. The power pins on Craignell are in the traditional DIL positions i.e. top right for 5V and bottom left for gnd as you look down on top.

One word of warning - we had a big uptake of the Craignell modules and stocks have gone. Lead time maybe currently 4-6 weeks. We trying to improve that but our assembly line is very busy. Basically we under estimated demand but once this initial shortage is sorted I expect these modules to be a stock item.

John Adair Enterpoint Ltd.

Schematics for Craignell3 (40 pin dil) are now on the engineering website here

John Adair Enterpo> >

I've been keeping an eye on your products for a while as I think there is a big market for this type of module for low-volume applications & I have a few apps of my own in mind - one of the great strengths of FPGAs is they are ideal for custom and low-volume apps, but this is frustrated by the packaging and fiddly extras like config and power.

Both the Craignell and Darnaw look very interesting, but I think there may be room for something in the middle pin-wise - maybe a similar general shape to the 40DIP , but with 2 rows of pins on each side, the inner rows corresponding to the 40 pin footprint. This would provide a lot more IO (and grounds if necessary) whilst still making it viable to route on a 2-layer (1 signal + 1 mostly groundplane) PCB, or a vero microboard style prototyping board. And you could put it in a 40 pin socket if you didn't need the extra IOs. A regards IO, I'm not sure how important 5V is as pretty much everything is 3.3v nowadays - I'd personally have much preferred to see a fast SRAM instead of the bus translators on Craignell.

Mike

The main target for Craignell is the obsolete and enhanced component markets and that is why it has 5V tolerance and drive levels. It happens to useful for some hobby, student and lash ups as a bit of a by-product. We are considering a mid-range module between the Craignells and Darnaws but no timescales or definates yet as we want to gauge the popularity of Craignell and Darnaw. The Darnaw1 can be run with just outer and inner pin rows only and still has 110 I/O to use in this configuration as a stop gap solution. I would think a 2 layer pcb would support this and even a stripboard mount is feasible (do I hear you all shuddering). We have made the decoupling on Darnaw1 reasonable to cope with relatively electrical poor hosts but how bad and still work will really depend on your application.

I'll say again that anyone identifies a real market for a product we don't already do it is worth talking to us offline. Assuming we have the manpower resource spare (which has not been much lately - now improving with extra teams) it can be a surprise at how quickly products can go from concept to being in customer hands. There is a product in our main development board range(not modules) that went from a customer request to being in their hands, tested, and working in 18 calendar days. We have another product at about 25 days development. Those remain as products which are essentially are still first issue products. I won't say which as it might be a competition answer yet but you are welcome to make your own guesses or a google search.

John Adair Enterpo> >

big market for this type

one of the great

is frustrated by the

room for something in

rows of pins on each

a lot more IO (and

signal + 1 mostly

put it in a 40 pin

translators on Craignell.- Hide quoted text -