CRC-4 algorithm using in G.704(&G.706)

There's nothing wrong with the G.704 specification, and there's nothing wrong with the E1 testers.

You have a bug.

You might need to tell us something about your implementation before we can help.

Regards, Allan

I know :) But there is also the G.706 recommendnation and there is another algorithm. there is {CRC computed by G.704} XORed with {CRC computed with Sa4(new) bits XORed with Sa4(previous) bits}.

i've also tried to divide the initial SMF(with C bits set to zero)complemented with 4 zero bits by the 10011 polynom using XOR rules and insert the residue of division into C bits as shown in G.704.

I've tried to use the scheme shown at page 33 FIGURE A.33/G.704. i didn't foget to reset triggers after SMF and set C bits to zero when fed it to this scheme.

can you place a verilog or any HDL text(or schematic as a picture) realizing the CRC4 algorithm?

A useful technique is to work through the algorithm on paper (or a spreadsheet, etc.). That way, you separate your understanding of the algorithm from any bugs you might have in your implementation. It's only a 4 bit CRC, so it shouldn't take to long to do by hand.

(See this recent c.a.f thread for an example:

Regards, Allan

Where can I take the shot bit consecution with true crc4 to compare with CRC computed by myself?

"Allan Herriman" schrieb im Newsbeitrag news: snipped-for-privacy@4ax.com...

Do a google search for "CRC explained"

Regards Falk

P.S. Iam not sure now about the detail of CRC4 in E1, but be aware that some bit are not included in the calcualtion??!