Conversion of Schematic to Verilog/VHDL

Hi Morpheus, The Mentor FPGA Advantage Tools do what you want. e.g. you can build Schematics with embedded blocks. Embedded block can have one or more processes (or other Statements and comments)inside, and look in the schematic similar (but not equal) to components. Furthermore it works the other way around too. So you can read in existing designs and convert them into schematics for structural analysis (and modification of course).

Not to mention that State Diagrams and Flowcharts are also supported in both directions.

As you mention that you are working in the avionics industry you surely can afford the price of these tools ;-)

Hope this is helpful to you

Eilert

morpheus schrieb:

Why do you have to convert the design at all ?

Would it not be worthwhile to learn VHDL or Verilog ?

Of course NOW it would be the easiest step to convert your proven schematic design.

But in the long run it might be better to be able to change the VHDL / Verilog description.

How do you simulate your designs?

Rgds Andr=E9

Morpheus,

First, if you work in avionics industry, then probably FAEs & sales reps will jump onto you as you ask them this question, because avionics can afford anything...

Second, if you want to convert schematic to HDL and certification of the design is critical, find a good FPGA design engineer to do the job at high-level code, because instead of generating this high-level code and synthesizing it (which is what you will probably do) you can synthesize the schematic directly. It's just weird to me to certify the code generated by tool, because usually it is better to design high-level code than to generate it, as well it is easier to blame somebody than some tools, which, just as the Matrix, may be not perfect :):):). (No hard feelings, Morph. could not resist :) )

Vladislav