Conflict found between ActiveHDL6.1 and ModelSim SE

When both of them were installed on my pc, I found:

1.ModelSim can't compile Xilinx library 2.ISE will give a fatal error when ActiveHDL try generate post-PAR timing simulation model

and they both can work well separately.

Reply to
Jay
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Have you tried AHDL 6.1 service pack 1?

Though using it with Altera (cos I have to) there are various fixes to bits and pieces. YMMV

Reply to
Paul Baxter

I've installed sp1 of AHDL, the problem still exists. But I just tried its flow with ISE5.2. "Paul Baxter" ?ÈëÏû?ÐÂÎÅ :3f300a06$0$11375$ snipped-for-privacy@news.dial.pipex.com...

bits

timing

Reply to
Jay

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