Hi, there:
I have ASIC source codes from a previous communication chip. It has some 23 clocks, many of them are derived from a 144MHz clock (72/36/24/18/.../2/1MHz), only three from other sources. The ASIC codes made use of a clock generator with clock gating...
How am I going to handle all these different clocks? In a Vertex chip, there is only 16 clock buffers.
May I use a "always @ posedge clk144mhz clk72mhz
Use only the 144 MHz clock and maybe the 72 MHz. if the others are necessary because you cant "guess" the correct position of the edge, then use a double flip flop and an xor to generate internal clock enables for all the rest (just treat them as inputs.)
A simple state machine could also be used to monitor the other clocks and generate the same clocks internally to the FPGA so that they are always in the correct phase.
You can do the same with the clock sources but remember monostability (add a third flip flop in front of the two).
Simon
23only
there
there
I don't know how practical this is in your situation, but you could drive all your registers off of the 144 MHz and then use the appropriate clock enables. To do this, you can create a Perl script that will go through the code and automatically insert enable code where needed. How hard this will be depends on the quality of the code you've inherited.
If you manage to do that, then you're done with the easy part. The hard part will be verifying that you didn't break anything. Unfortunately it's doubtful extensive test code came along with the source code, so you will have to do it yourself.
If you don't like the idea of that, I suppose you could keep all your 23 clocks, and use regular routing resources for the least used clocks. Then throw in aggressive MAXSKEW timing constraints to try and manage it all. I have never tried this, but I think you'd get more headache and stress with this option. A harder time routing, and perhaps tough to track down timing bugs.
Well hopefully someone will come up with an easier solution. Best of luck.
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.