Hi Guys,
I was asked to prepare a presentation on the topic below for a job interview:
Comparision of Advantages/Disadvantges of Verilog or VHDL in Hardware verification
Someone plz educate me. I am new to these.
Thank you.
Regards, Jay
Comparision of Advantages/Disadvantges of Verilog or VHDL in Hardware verification
Sep 17, 2014
2 Replies
Do you mean compare Verilog vs. VHDL, or HDLs vs. something else?
If you have done hardware logic design, then we can probably explain some of what you need to know. If not, then you have a lot to learn.
-- glen
interview:
verification
I suspect that the job involves a lot of teaching and customer presentations. They are really judging you on your communication skills. The verilog/vhdl is not important.
John Eaton
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