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Building a Huffman codebook in VHDL

Hi,

I've been looking at available VHDL/Verilog implementations of huffman coders. It appears that all currently available implementations use a fixed codebook (e.g. the one specified in the MPEG standard) for coding and decoding, and thus are quite trivial (they just look up symbols in that fixed codebook). I'm more interested in building a huffman codebook from the input data. It appears that this can become quite difficult due to the use of changing tree structures, which seem quite complicated to do in hardware. Can anyone point me towards readily available (read: free) implementations for such an encoder?

Thanks in advance Enno

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no_reply
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Il 21/10/2007 0.44, no_reply ha scritto:

Check "FPGA Implementation of the Dynamic Huffman Encoder", Ernest Jamro, Maciej Wielgosz, Kazimierz Wiatr AGH University of Science and Technology al. Mickiewicz 30, 30-051, Poland Academic Computer Center CYFRONET ul. Nawojki 11, Kraków 30-950, Poland email: jamro / snipped-for-privacy@agh.edu.pl

They "augment" a standard, lookup table huffman encoder with an histogram unit, then use a microblaze to update the table on the fly.

To easily implement Huffman in hardware you need a length limited code, so you can use a fixed width ram table to compress. So you may be interested in this, also:

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The links at the bottom are a very good place to start.

I didn't find any free core, so far.

Please share your results!

Reply to
Antonio Pasini

Antonio Pasini wrote: There are several examples to be found on internet. Did you type it in google before asking here? One example is:

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(title: Huffman coding) taco

Reply to
taco

I suppose the OP googled a bit before asking here. At least, I did.

The OP asked for a *dynamic table* huffman encoder.

Specifically, not a fixed table encoder, as the XAPP616 do (uses MPEG table, as I understand it).

Reply to
Antonio Pasini

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