I am trying to add USB IP core to PLB bus (not xilinx core), I have few basic doubts each time if I add any new IP core to exist hardware config do I need to build new Libraries and BSPs and integerate with kernel source and build new kernel?.
Which part of kernel changes each time I add new IPcore ?
because after adding new core I couldnot build new BSPs..Iam getting problems.
One more doubt is I want to build my own base(hardware) system, but am getting messed up with memeory mapping...is any standard logic I should follow for memory mapping, can I get any tutorial which has example templete for memory mapping .
I know above questions are simple so any of your suggestions can boost my confidence as beginner.
thanks