Hi
How do i compare asic power/timing features for the same design with an FPGA having that same design....i mean what tecnology does xilinx use to fabricate their die ,
The Xpower readings from the ISE foundation gives an estimate of power , but i would like to know with which asic flow is this power comparable ultimately leading to a hybrid chip ( if it was possible)
thanks Paraag
The flexibility in logic and routing causes FPGAs to have lower speed and higher power consumption than ASICs of similar technology. FPGAs make up (partially) for this by always being at the cutting edge of technology. 130 nm and 9-layer metal in high-volume production since
2003, 90 nm >Have something to add? Share your thoughts — no account required.
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