Hello experts, Would like to hear from you regarding the precautions, the common practices and problems that arise when migrating an ASIC RTL code into an FPGA.
Thanks & Regards, Srini.
Hello experts, Would like to hear from you regarding the precautions, the common practices and problems that arise when migrating an ASIC RTL code into an FPGA.
Thanks & Regards, Srini.
Is this university homework or have you a specific project in mind?
What Fpga family are you migrating to? What Asic technology was the RTL code originally targeted at?
Alan
Try Altera App Note 311: ASIC to FPGA design methodology and guidelines.
Hope this helps, Subroto Datta Altera Corp.
And second item shown up by a google search for asic fpga methodology :-)
Subroto Datta wrote:
Hi Alan, I am going to get a project of this sort. So, I am just preparing for it.
Regards, Sr> sr>
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