UARTs and interrupts

The 8051 core disables interrupts OF THE SAME PRIORITY while servicing an interrupt. An interrupt of a higher priority can interrupt one of a lower priority. In the old days it was still simple because the original 8051 had only two interrupt priority levels. However, some modern derivatives have more.

Ian

I did not quite get a yes or no. I am using this on a PIC and 8051. The Keil C example had interrupt disabled, so I did not look at it in detail. I will look to see if it can be done. I an not a big fan of disabled interrupts. I messes up the latency of the other interrupts.

Neil Kurzman schrieb:

I will

other

An example for a buffer feeding routine without disabled interrupts for the 8051 is given in section 3.12 "Inline Assembler Code" of

Greetings, Frieder

Gee. Maybe there is no "yes or no" answer.

-- Grant Edwards grante Yow! Put FIVE DOZEN red at GIRDLES in each CIRCULAR visi.com OPENING!!

detail. I will

other

Thanks I will look.

I hate when that happens.