SRAM vs Cache

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Hi all!

What's the difference in "gates density" between a typical
CPU L1 cache and on chip static RAM?

I mean.. how many logic gates are necessary for e.g. 4 KB
of 80486-style L1 cache, and how many for embedded SRAM?

I guess that for the latter it's no less than 65536 gates
(please feel free to provide an exact value!), but for the
L1 cache of equivalent size, how many gates are necessary?
(with gates I mean basic NAND gates).

Thank you!

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