I did 57.6K on a ~1 MHz processor, but it was tx only. Still, it worked great for printf() output while bringing the board up. IIRC, on that same processor, I did a 1200 Bell-202 modem (rx and tx) using a counter/timer, but I used a hardware UART for that.
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Grant Edwards
The kernel never uses and never disables the FIQ. It runs completely outside of kernel awareness and control.
Been there, done that. The FIQ jitter does not change noticably under load. Any interactions with normal kernel code have to be done very carefully, since you can't use any of the kernel's normal synchronization mechanisms.
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hamilton
How about the TWI or SPI ports ??
Will you need two way communication ??
Creating a real time serial data in a non-realtime operating system seems doomed to failure.
Thinking out loud, to send serial data bytes: how about the SPI data port acting as the 8-bit serial data.
As the SPI port holds the state of the last bit sent, three bytes
0x01,(Txdata>,0x80.
Setting the SPI baud rate timer for 104.166 uSec would give you ~9600 board. Update time between byte would be ~.83 mSec.
The SPI holding register will keep the bytes side-by-side.
RxData will be much harder.
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