Hi all, I want to know exact difference between software interrupts and hardware interrupts. I also want to know whether timer interrupt in 8051 is a software interrupt or a hardware interrupt. Best regards, Ishita
Except that they are handled through the interrupt system rather than through the programming interfaces. This is very different from subroutine calls.
The 6809 (and 68K?) SWI instruction had an interrupt vector, just like the hardware interrupts. Other processors have the same arrangement. At least one operating system I studied used SWI as a system call, since the processor had a system space and a user space. The only access to system space from user space was through the interrupt system: users could not access system space at all. To make a system call, you loaded a code into a register and executed a SWI instruction. The OS was located in system space, and when the SWI vector was executed, it was able to interpret the call and execute the proper system function. Sort of primitive virtual memory system.
Sorry, I can't recall the specific processor or OS. Anyone?
The only difference is that the start address is predefined (the interrupt vector) and some additional information, such as the processor status word is pushed on the stack.
This is more or less standard practice for operating systems on hardware that support separate user and kernel address spaces. It has been used at least since the 1970's (e.g. the PDP-11 EMT 377 trap), but still I do not consider that mechanism as a true interrupt environment, in which the program flow could be interrupted at any point.
A hardware interrupt is an interrupt generated by external hardware connected to the interrupt pin of the processor. We can mask/umask these interrupts. An example is: these will be used in simple temperature control system - when the temprerature is above 50 degrees, then a sensor will generate a signal, which in turn will be connecter to the interrupt pin of the processor. Based on the interrupt, you can take control action.
A software interrupt is an interrupt generated by an instruction. An example of software interrupt usage is: In a function/subroutine, some strange result is got and you do nto want to return that value, in those situations, you can use software interrupts. (you can visualise this to be like try-catch exception, where you transferthe control)
Both the interrupts has ISR.
The timer interrupt in 8051 is a software interrupt. Check SFR register.
Pretty much any processor that has different levels of processor state (such as "supervisor" and "user" levels for the 68k, or "rings" for the x86) has to have a mechanism like this, so that a user-level program can pass control to a supervisor-level program (i.e., OS). In most cases, the interrupt handling mechanisms are reused (abused?) - hence the term "software interrupt". Basically, the SWI instruction (or equivalent) sets an interrupt flag just like a peripheral would. Some architectures have the decency to give the instruction a sensible name - the 68k ISA has 16 separate "software interrupt" instructions, called "Trap #0" through "Trap #15". Bigger processors also use the same mechanism for trapping errors, such as divide by zero, or address errors, which are synchronous to the main code.
Other methods can be used to get to supervisor level - I believe the x86 "call gates" are somewhat different from interrupts, and are used for OS calls (in 16-bit mode, such as for DOS, they use traditional software interrupts).
There are also things in-between a software-generated interrupt and a an externally generated interrupt. These are generated by the CPU in response to software events. These are sometimes called "traps" or "exceptions". Divide-by-zero was mentioned earlier, but there are also alignment exceptions, page faults, and other things that are more difficult or expensive to detect purely in software.