SMBus NACK Command/Data

An SMBus receiving slave may indicate reception of invalid command or data by using the NACK mechanism. My understanding is that most micro-controller I2C module typical sequence is to immediately generate the NACK or ACK based on a bit setting in the I2C control register when you read the I2C module data register. The preferred sequence would be to stretch the clock, read the command/data byte, check if it is a valid command/data, set a bit to indicate ACK or NACK, and then generate the ACK or NACK. Is there a micro-controller I2C module that implements this feature or do I have to use bit-banging I2C?

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