PIC microcontroller I2c communication problem

im using 18f4455 PIC micro controller for a i2c communication. according to the data sheet, in order to generate start condition, we need to set 0 th bit in SSPCON2 register. when inspected i see that the bit does not get set. i wait until the i2c module is idle before setting that bit. And i've already enabled the SSP by setting SSPEN bit. im using icd 2 as the debugger to inspect registeres. however when i select the simulator instead of the debugger and inspect the register, it shows that bit gets set properly. any one here got any idea about the problem?

Reply to
CMOS
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Is this behavious specific to this 'Register(SSPCON2 )' or Do you find 'some other registers also' having the same kind of behaviour ?

Does that specific 'bit' in that SSPCON2 register behave like this Or, 'All the bits' in that SSPCON2 register behave like this ?

Karthik Balaguru

Reply to
karthikbalaguru

i did't check whether other bits in the same register can be set or not. but this behavior is specific to this register. how ever this is a configuration register, so it is writable.

Reply to
CMOS

some other bits gets set in the register. in the manual it says this bit will not get set if i2c module is not in idle state. but i check for idle state before setting it.

Reply to
CMOS

If the register is write only make sure that you do a byte wide write and not a single bit read modify write operation.

w..

CMOS wrote:

Reply to
Walter Banks

e

r,

Interesting ! Are you able to decode the other bits set in the register ? Does that 'some other bits' have any impact ?

As per your spec, it is like this -> If the i2c module is active, then that bit be set.

Are there some other registers to be configured programmatically for enabling this functionality ? Checkout if there is any relation between the active/idle state of this module with other modules. That can give you some hint.

Karthik Balaguru

Reply to
karthikbalaguru

I'm an amateur with the pic and I2C, so take this with a grain of salt :)

After you set the start enable bit, SEN (0 bit in SSPCON2) the hardware will automatically clear it again after it completes the start condition. So if you are not using interrupts to notify when it is completed, you can test that the start condition has completed with a loop:

bsf STATUS, RP0 ; Bank 1 bsf SSPCON2, SEN ; init start condition Loop_sen: btfsc SSPCON2, SEN ; loop til completed goto Loop_sen

So it could be that by the time you check the registers with icd2, the hardware has already finished the condition and cleared the bit??

Reply to
Dean

ll

if

Interesting behaviour :):) Possibilities are there for such a design. I think, that hardware behaviour should have been hightlighted in the spec while describing that specific bit/register or the OP should have missed those points.

Karthik Balaguru

Reply to
karthikbalaguru

thanks for the suggestions

i also think that by the time i check the register value, it is again reset by the i2c peripherals, which does not stop just because i've set a breakpoint in code. so i used a logic analyzer to see whether there is any i2c bus activity, but could not see any..

Reply to
CMOS

hi, i think in 18f4455, microchip has discontinued re-setting SEN bit behavior. instead an interrupt flag is set. so there is no much confusion. and the reason for not setting the bit was, i haven't configured scl,sda lines as digital IO pins. by default they are analog IO.

any way, much thanks for your suggestions and advices. CMOS

Reply to
CMOS

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