NE2000 NIC driver for Linux 2.6

Hello,

I'm trying to write my own driver for NE2000 NIC PCI card for Linux. I read the docs for DP8390 (NE2000) controller but I can't understand the remote DMA operations. The doc mentions that remote DMA can be used to move received frames from rx-ring to host memory. How can I use this remote DMA to transfer while there is not any 32bit registers to specify memory address in host memory?

efo

Reply to
efo
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2014-04-06 15:55, snipped-for-privacy@neostrada.pl skrev:

The NE2000 was designed for the ISA bus, which did not have any bus master functionality, similar to that of PCI.

The NE2000 is/was intended for a board which had a local dual-access memory on the board. This memory is limited by the narrow address bus. If a Board is a bus master, and can autonomously write packets from the board to system memory over the PCI bus, then it is not NE2000 compatible.

BR Ulf Samuelsson

Reply to
Ulf Samuelsson

So if NE2000 doesn't have possibility to direct access to host memory - how can I put packet from host to NE2000 and how to fetch received packet to host memory?

efo

Reply to
efo

You read from it and write to it.

All versions of the NE2000 had PIO control, later versions also had DMA target support (but *not* bus mastering). You set up a transfer using PIO and then perform the transfer using PIO or DMA.

George

Reply to
George Neuner

PIO. I was going to describe the sequence, but I'll just quote

formatting link
instead:

"Sending a Packet The following sequence is the one observed by the ne2k-pci module in linux. Note that some odd cards needs a patch (read-before-write) that isn't covered here. The data configuration is initialized at 0x49 (word transfer, 8086 byte order, dual 16bit DMA, loopback disabled). Note that the weird driver doesn't seem to use interrupts for completion notification.

  1. COMMAND register set to "start" and "nodma" (0x22)
  2. RBCRx are loaded with the packet size
  3. "Remote DMA complete?" bit is cleared by writing a 1 in bit 6 of ISR (that's odd, but that's the way it works)
  4. RSARx are loaded with 0x00 (low) and target page number (high) respectively. At this stage, the chip is ready receiving packet data and storing it in the ring buffer for emission.
  5. COMMAND register set to "start" and "remote write DMA" (0x12)
  6. Packets data is now written to the "data port" (that is register
0x10) of the NIC in a loop (or using an "outsx" if available). The NIC will then update its remote DMA logic after each written word/dword and places bytes in the transmit ring buffer.
  1. Poll ISR register until bit 6 (Remote DMA completed) is set."

Receiving a packet is similar.

Reply to
Robert Wessel

AFAIR, the Adaptec SCSI host adapters (1540, 1542, etc) did do bus mastering in ISA systems.

--
Nils M Holm  < n m h @ t 3 x . o r g >  www.t3x.org
Reply to
Nils M Holm

Ok, thank you. That is what I needed - the info about address of "data port" - 0x10. In my documentation there was no info about

0x10 address so I didn't know how to fetch or push data to NIC internal RAM. efo
Reply to
efo

Huh.

I wonder why it's specified that the DRQ0 to DRQ3 and DRQ5 to DRQ7 lines are specified to not only request service from the system DMA channel of that number, but also (quoting from

formatting link
here) " ... or to request ownership of the bus as a bus master device. ... "

As noted in another message, the Adaptec SCSI controllers (the 1540 et al) were DMA bus masters, or rather, could be when configured that way.

RwP

--
I was sitting there, under my blanket, with fever and flu-like symptoms. 
I was fuzzy in the head and having a hard time concentrating. 
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Reply to
Ralph Wade Phillips

The ISA bus did have mastering capability - the NE2000 didn't use it because it was designed to be cheap.

George

Reply to
George Neuner

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