SDRAM Initialization Sequence

Btw, I am using Samsung K4S281632F-TC75 128Mb SDRAM.

I found documentations on device operations for Samsung SDRAM with Power Up Sequence (some pre-charge, auto refresh and MRS commands), is that sequence what my boot up code should perform?

Should this sequence be performed after or before remapping? I suppose its after the System Manager registers are set...

Would appreciate very much if anyone who have done similar initialisation to post that portion of your code. Thanks alot!

Another question, how do you assert the CPU output pins like nCAS, nRAS, nDWE? There is no registers I can write value to set these pins right?

Thanks!

Hello,

I posted early on regarding how to initialise SDRAM. Did some more research and got the following observations, would like to verify them...

MUC: Samsung S3C4510B SDRAM: Samsung K4S281632F-TC75 128Mb (8Mx16 CAN=9)

There is a SDRAM Power-up Sequence timing diagram (4-34) in the 4510B manual, am I right to interpret the that is definitely how the MCU will assert those signals whenever it power up or rather after it is informed that there is SDRAM onboard (by setting of the DRAMCON)?

As I observed, the sequence of 200us NOP, Precharge, 2xAuto Refresh and MRS is the same as the sequence in SDRAM initialization sequence. But I noticed that the signal assertion for the precharge is abit different from the signals needed in the precharge command of the SDRAM. Eg. The nDWE and A10/AP signals are supposed to go low, but it remains high in the 4510B timing diagram.

If the sequence of the MCU is fixed, I think it means that we just require to setup the DRAMCON register for the timing of each signals and the initialization is taken care by the MCU automatically...?

But how do we take care of the difference in the assertion of signals for the precharge command if we are unable to assert the pin to whatever level we want?

Is setting the DRAMCON sufficient to use the SDRAM.

Thanks in advanced!

Rgds, Leslie

mantaray wrote: : Hello,

: I posted early on regarding how to initialise SDRAM. Did some more : research and got the following observations, would like to verify : them...

: MUC: Samsung S3C4510B : SDRAM: Samsung K4S281632F-TC75 128Mb (8Mx16 CAN=9)

: There is a SDRAM Power-up Sequence timing diagram (4-34) in the 4510B : manual, am I right to interpret the that is definitely how the MCU will : assert those signals whenever it power up or rather after it is : informed that there is SDRAM onboard (by setting of the DRAMCON)?

Look at the boot code for BIOS-LT at the folloing sites.

You have the option for changing many of the initial parameters such as the SDRAM interface values and save it to the boot block part of the flash. I use mostly 32 bit SDRAM parts on my board and I have not had a problem with booting the image that BIOS-LT has in it by default. It looks like you have 16bit wide SDRAM so you will have to just to change the default 32 bit wide to 16 bit wide before you build an image. I have TSOP sockets on some of my boards so I just boot on the 32 bit board and configure the BIOS-LT parameter to 16 bit and the plug it into the 16 bit board. I can send both

greg (dot) holdren (at) (dot) com

will

the

default. It looks

default 32 bit wide to 16 bit wide before you build an image. I have TSOP sockets on

BIOS-LT

both

Hello, I am lucky, i am working with KMC board with NEC vr4131 processor and samsung K4S561632C SDRAM. my processor have an inbuilt SDRAM control unit. When we are initializaing the sdram, we have to follow the sequence(200us NOP, Precharge, 2xAuto Refresh and MRS) or initializaing the sdram controller's registers is enough. I tried by initializaing the SDRAM control unit registers initialization.After the initialization, i copied my init code from flash to ram.But the contents on the flash and copied code on the SDRAM is not equal. That means the problem is because of improper SDRAM initialization or something else. Any suggestion is greatly helpful.

Thanks in advance

Regards, Lucky

--------------------------------------- This message was sent using the comp.arch.embedded web interface on

will

the

default. It looks

default 32 bit wide to 16 bit wide before you build an image. I have TSOP sockets on

BIOS-LT

both

Hello, I am lucky, i am working with KMC board with NEC vr4131 processor and samsung K4S561632C SDRAM. my processor have an inbuilt SDRAM control unit. When we are initializaing the sdram, we have to follow the sequence(200us NOP, Precharge, 2xAuto Refresh and MRS) or initializaing the sdram controller's registers is enough. I tried by initializaing the SDRAM control unit registers initialization.After the initialization, i copied my init code from flash to ram.But the contents on the flash and copied code on the SDRAM is not equal. That means the problem is because of improper SDRAM initialization or something else. Any suggestion is greatly helpful.

Thanks in advance

Regards, Lucky

--------------------------------------- This message was sent using the comp.arch.embedded web interface on