Has someone in this group experience with the special purpose DMA- channels for the Quick Capture Interface implemented in Mavell's PXA3xx CPUs? Coming from PXA270 I have a hard time to figure out how to port a driver design to that chip. The driver tries to pick a single frame from the datastream coming from a sensor. PXA270 has a seperate bit to enable DMA transfers and a bit in the descriptor itself to stop the transfer, no problem there (wait for end of last frame, start DMA, let it end itself after all data has been received).
But PXA3xx has only the "enable QCI" bit and the descriptor bit to stop DMA isn't supported by the special purpose DMA. So I assumed that DMA was always running, used a small scratchbuffer and just changed the descriptor chain to point to the real buffer when data was interesting. But the next "fifo overflow" interrupt showed that DMA WASN'T running. So there is a possibility/need to start/stop QCI DMA? I don't find anything in the datasheets :-(
Any pointers? DMA going bezerk has funny effects ;-)