In my Linux device driver, I am frequently DMA'ing to the SDRAM. My board has an MPC8272 processor. I have noticed the time from the start of the DMA to when I get the DMA interrupt can vary as much as
100X. The amount of data being DMA'd is consistent. What could account for such a wide variation? Is there anything I can do to insure that the DMA takes place in a timely manner every time?
Thank you.