Processor Clock speed change abd RS232

I am looking for a microcontroller with UART that will run at 1Mhz normally and 8Mhz when more power is available. My problem is the receive on the RS232 when changing the processor clock speed. I think this will cause an upset in any receive characters coming in at the change over. Has any body got any ideas for a low power processor (0.5mA at 1MHz) that can change processor clock speed without upsetting the receive side of the RS232.


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Rather than switching speeds, can you just use a sleep mode to reduce power consumption?


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Mike Warren


  1. change the clock divisor when you switch speeds. Look at maybe an MSP430, where you can reprogram the DCO according to your current power mode.

  1. use a micro that can accept an external clock for the UART. However this will inherently waste power.

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Maybe, but just wondered if possible to switch clock speed without upsetting RS232.

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How do you change the speed ? Do you have a separate crystals for 1 MHz or 8 MHz, or are you using an 8 MHz oscillator and an external CMOS divide by 8 divider and a data selector to either select 1 or 8 MHz.

Use a separate crystal for the UART running at constant frequency with a suitable fixed divider.

If there are no requirements for accurate CPU frequency, why not just use an RC oscillator and switch in extra capacitors/resistors to alter the frequency.

One approach would be to change the CPU speed and divider settings in the RxFull interrupt between characters. Of course you would have to suspend transmitting new characters between the speed change request and the RxFull interrupt, assuming constant incoming bytes.


Reply to
Paul Keinanen

Pick a processor like the MSP430 where the UART and CPU can run from different clocks. Most modern microcontrollers are set up to do that.

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Grant Edwards

You could run the clock from a VCO controlled by a phase lock loop, and control the slew rate so that clocks are continuous, rather than discrete jumps.

The fixed crystal runs the UART proper, and provides the reference for the phase locked loop. You might even be able to use the cpu and the analog of delta-modulation to control the VCO with minimum hardware. Getting started could be a problem.

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You are right, a surprising number of uC scale the Peripheral clock, when they scale the core clock. Seems the wrong thing to do, and the power delta must be tiny, relative to the OscBuffer ? Might be forced on them by flag handshake handling ?

One device that looks to do this properly, is the Silabs C8051Fxx series

This has a choice of SYSCLK or PreScaledClk into the Baud timers. Thus you can freely scale the CPU, and not mess up the peripherals.

The C8051F41x specs core at 300uA/1Mhz active, and 150uA/1Mhz idle, so you might get the whole device inside 500uA/1MHz.

It also has an on chip regulator, so Icc does not change with Vcc, and covers 2.1-5.5V


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Jim Granville

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